CSCI 5980: Current Trends in Computer Architecture and Compiler Optimization

Syllabus

Where: MechE 102

When: 6:30PM-9:00PM Monday

Course Number: 66518

This course explores the motivation and design issues behind recently emerged innovations in computer architecture and investigates how the compiler and the hardware can work in tandem to fully exploit the potential of each innovation. By comparing and contrasting hardware-base and compiler-based techniques in architecture design, the students will gain an in-depth understanding of the design trade-offs in modern architecture. Performance, although very important, is not the only criteria in optimizing computer systems, this course will also discuss recent proposals on improving the non-performance metrics in computer systems.

This course will cover but is not limited to the following topics:

Prerequisites:

Graduate standing. Students should be familiar with basic computer architecture concepts such as pipelining, caches, cache coherence protocol, and branch prediction. Exposure to classic compiler optimization techniques such as dataflow analysis, register allocation and alias analysis is a plus.

Course material:

There is no textbook. The course would be based on research literature and recent publications in architecture and compiler conferences such as ASPLOS, PLDI, ISCA, Micro and CGO.

Course work:

The course is organized as a seminar where we discuss a different topic every week. Two to three papers will be assigned to each topic. All students are expected to read the papers and submit part 1 of the summary before class. One student is responsible for presenting the paper and leading the discussion during class. Part 2 of the summary is due 2 days after class. All summaries will be available online. There will also be a written assignments and a class project.

Grading:

Paper summaries 30%
Presentations and discussion 30%
Project 40%

Instructor:

Antonia Zhai (zhai at cs dot umn dot edu), 6-189 EE/CSci Building, 626-1285