Antonia Zhai
Antonia Zhai
Associate Professor

Department of Computer Science and Engineering
University of Minnesota


Physical Addresses Virtual Addresses

4-192 EE/CSci Building

Voice: (612) 626-1285
200 Union Street SE FAX: (612) 625-0572
Minneapolis, MN 55455 Email: zhai at cs dot umn dot edu
Office: 6-205 EE/CSci Building   WWW: http://www.cs.umn.edu/~zhai

Refereed Journals

  • Compiler and hardware support for reducing the synchronization of speculative threads. Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, and Todd C. Mowry. ACM Transactions on Architecture and Code Optimization (TACO), Volume 5, Issue 1, 2008.

  • The STAMPede Approach to Thread-Level Speculation. J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai and Todd C. Mowry. ACM Transactions on Computer Systems (TOCS), Volume 23, Issue 3, Pages 253 - 300, August 2005.

Refereed Conferences/Workshops

  • Energy-Efficient Speculative Threads: Dynamic Thread Allocation in Same-ISA Heterogeneous Multicore System Yangchun Luo, Venkatesan Packirisamy, Wei-Chung Hsu and Antonia Zhai in the Proc. the Parallel Architectures and Compilation Techniques (PACT), 2010.

  • Improving the Performance of Program Monitors with Compiler Support in Multi-Core Systems Guojin He and Antonia Zhai, in the Proc. the IEEE International Parallel \& Distributed Processing Symposium (IPDPS), 2010.

  • Exploiting TLS Parallelism at Multiple Loop-Nest Levels, Venkatesan Packirisamy and Antonia Zhai, in the Proc. Fifteenth International Conference on Parallel and Distributed Systems (ICPADS), 2009
  • Performance Characterization of Data Mining Benchmarks Vineeth Mekkat, Ragavendra Natarajan, Wei-Chung Hsu and Antonia Zhai, The Fourteenth Workshop on Interaction between Compilers and Computer Architectures (Interact-14), Pittsburgh, PA, March 13, 2010.

  • Hardware and compiler support for dynamic software monitoring (pdf). Antonia Zhai, Guojin He, and Mats Heimdahl, in the Proc. 9th International Workshop on Runtime Verification (RV 2009), Grenoble, France, June, 2009.

  • Dynamic performance tuning for speculative threads (pdf). Yangchun Luo, Venkatesan Packirisamy, Wei-Chung Hsu, Antonia Zhai, Nikhil Mungre, and Ankit Tarkas, in the Proc. International Symposium on Computer Architecture 2009, (ISCA 2009), Austin, TX, June 2009.

  • Exploring speculative parallelism in SPEC2006 (pdf). Venkatesan Packirisamy, Antonia Zhai, Wei-Chung Hsu, Pen-Chung Yew, and Tin-Fook Ngai, in the Proc. 2009 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2009), Boston MA, April 2009.

  • Efficiency of thread-level speculation in SMT and CMP architectures - performance, power and thermal perspective (pdf). Venkatesan Packirisamy, Yangchun Luo, Wei-Lung Hung, Antonia Zhai, Pen-Chung Yew, and Tin-Fook Ngai, in the Proc. 2008 IEEE International Conference on Computer Design (ICCD 2008), Lake Tahoe, CA, October 2008.

  • Ex-Mon: An Architectural Framework for Dynamic Program Monitoring on Multicore Processors. Guojin He, Antonia Zhai and Pen-Chung Yew, in the Proceedings of the 12th Workshop on Interaction between Compilers and Computer Architectures (INTERACT-12), 2008.

  • Compiler Optimizations for Parallelizing General-Purpose Applications under Thread-Level Speculation (pdf). Antonia Zhai, Shengyue Wang, Pen-Chung Yew, and Guojin He, in the Proc. 2008 IEEE International Conference on Computer Design (PPoPP2008), (Poster) Lake Tahoe, CA, October 2008.

  • Supporting Speculative Multithreading on Simultaneous Multithreaded Processors (pdf). Venkatesan Packirisamy, Shengyue Wang, Antonia Zhai, Wei-Chung Hsu, and Pen-Chung Yew, in the Proc. International Conference on High Performance Computing (HiPC'06), Bangalore, India, December 18-21, 2006.

  • A Study of the Performance Potential for Dynamic Instruction Hints Selection , (pdf). Rao Fu, Jiwei Lu, Antonia Zhai, and Wei-Chung Hsu, in the Proc. 11th Asia-Pacific Computer Systems Architecture Conference (ACSAC 2006), Shanghai, China, September 6-8, 2006.

  • Issues and Support for Dynamic Register Allocation (pdf). Abhinav Das, Antonia Zhai, Rao Fu, and and Wei-Chung Hsu in the Proc. 11th Asia-Pacific Computer Systems Architecture Conference (ACSAC 2006), Shanghai, China, September 6-8, 2006.

  • Exploiting Speculative Thread-Level Parallelism in Data Compression Applications, (pdf). Shengyue Wang, Antonia Zhai, and Pen-Chung Yew. in the Proc. 19th International Workshop on Languages and Compilers for Parallel Computing (LCPC'06), New Orleans, Louisiana, November 2-4, 2006.

  • Loop Selection for Thread-Level Speculation (pdf). Shengyue Wang, Xiaoru Dai, Kiran S. Yellajyosula, Antonia Zhai, and Pen-Chung Yew. Workshops on Languages and Compilers for Parallel Computing, Hawthorne, New York, USA, November 2-4, 2005.

  • A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion (pdf). Xiaoru Dai, Antonia Zhai, Wei-Chung Hsu and Pen-Chung Yew. The 3rd International Symposium on Code Generation and Optimization (CGO-2005), San Jose, CA, USA, March 20-23, 2005.

  • Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads (pdf). Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan and Todd C. Mowry. The 2nd International Symposium on Code Generation and Optimization (CGO-2004), Palo Alto, CA, USA, March 20-24, 2004.

  • Compiler Optimization of Scalar Value Communication Between Speculative Threads (pdf). Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan and Todd C. Mowry. The Tenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), San Jose, CA, USA, Oct 7-9, 2002.

  • Improving Value Communication for Thread-Level Speculation (pdf). J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, and Todd C. Mowry. The Eighth International Symposium on High Performance Computer Architecture (HPCA2002). Cambridge, MA, Feb 2002.

  • A Scalable Approach to Thread-Level Speculation (pdf). J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai and Todd C. Mowry. International Symposium on Computer Architecture 2000 (ISCA2000). Vancouver, Canada, June 2000.

Thesis

  • Compiler Optimization of Value Communication for Thread-Level Speculation (pdf). Antonia Zhai.

Thesis Supervised

  • Exploring Efficient Architecture Design for Thread-Level Speculation --- Power and Performance Perspectives (pdf) Venkatesan Packirisamy, 2009 (co-supervised with Prof. Yew)
  • Compiler Techniques for Thread-Level Speculation (pdf) Shengyue Wang, 2007 (co-supervised with Prof. Yew)